@article{DBLP:journals/tvlsi/ChangGZ05,
author = {Chip-Hong Chang and
Jiangmin Gu and
Mingyan Zhang},
title = {A review of 0.18-/spl mu/m full adder performances for tree
structured arithmetic circuits},
journal = {IEEE Trans. VLSI Syst.},
volume = {13},
number = {6},
year = {2005},
pages = {686-695},
ee = {http://doi.ieeecomputersociety.org/10.1109/TVLSI.2005.848806},
bibsource = {DBLP, http://dblp.uni-trier.de}
}