Middle terminal cell models for efficient over-the-cell routing in high-performance circuits.

Siddharth Bhingarde Anand Panyam Naveed A. Sherwani Middle terminal cell models for efficient over-the-cell routing in high-performance circuits. 462-472 1993 1 IEEE Trans. VLSI Syst. 4 http://doi.ieeecomputersociety.org/10.1109/92.250194 db/journals/tvlsi/tvlsi1.html#BhingardePS93