TAS-MRAM-Based Low-Power High-Speed Runtime Reconfiguration (RTR) FPGA.

Weisheng Zhao Eric Belhaire Claude Chappert Bernard Dieny Guillaume Prenat TAS-MRAM-Based Low-Power High-Speed Runtime Reconfiguration (RTR) FPGA. 2009 2 TRETS 2 http://doi.acm.org/10.1145/1534916.1534918 db/journals/trets/trets2.html#ZhaoBCDP09