A concurrent built-in self-test architecture based on a self-testing RAM.

Ioannis Voyiatzis Antonis M. Paschalis Dimitris Gizopoulos Nektarios Kranitis Constantin Halatsis A concurrent built-in self-test architecture based on a self-testing RAM. 69-78 2005 54 IEEE Transactions on Reliability 1 http://dx.doi.org/10.1109/TR.2004.842091 db/journals/tr/tr54.html#VoyiatzisPGKH05