BibTeX record journals/tr/HuangWLW03

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@article{DBLP:journals/tr/HuangWLW03,
  author       = {Chih{-}Tsun Huang and
                  Chi{-}Feng Wu and
                  Jin{-}Fu Li and
                  Cheng{-}Wen Wu},
  title        = {Built-in redundancy analysis for memory yield improvement},
  journal      = {{IEEE} Trans. Reliab.},
  volume       = {52},
  number       = {4},
  pages        = {386--399},
  year         = {2003},
  url          = {https://doi.org/10.1109/TR.2003.821925},
  doi          = {10.1109/TR.2003.821925},
  timestamp    = {Tue, 17 Oct 2023 15:22:33 +0200},
  biburl       = {https://dblp.org/rec/journals/tr/HuangWLW03.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

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