SOC test-architecture optimization for the testing of embedded cores and signal-integrity faults on core-external interconnects.

Qiang Xu Yubin Zhang Krishnendu Chakrabarty SOC test-architecture optimization for the testing of embedded cores and signal-integrity faults on core-external interconnects. 2009 14 ACM Trans. Design Autom. Electr. Syst. 1 http://doi.acm.org/10.1145/1455229.1455233 db/journals/todaes/todaes14.html#XuZC09