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Amit Singh Ganapathy Parthasarathy Malgorzata Marek-Sadowska Efficient circuit clustering for area and power reduction in FPGAs. 643-663 2002 7 ACM Trans. Design Autom. Electr. Syst. 4 http://doi.acm.org/10.1145/605440.605448 db/journals/todaes/todaes7.html#SinghPM02