Physical synthesis for FPGA interconnect power reduction by dual-Vdd budgeting and retiming.

Yu Hu Yan Lin Lei He Tim Tuan Physical synthesis for FPGA interconnect power reduction by dual-Vdd budgeting and retiming. 2008 13 ACM Trans. Design Autom. Electr. Syst. 2 http://doi.acm.org/10.1145/1344418.1344426 db/journals/todaes/todaes13.html#HuLHT08