Fast Block Motion Estimation With 8-Bit Partial Sums Using SIMD Architectures.

Chunjiang J. Duanmu M. Omair Ahmad M. N. S. Swamy Fast Block Motion Estimation With 8-Bit Partial Sums Using SIMD Architectures. 1041-1053 2007 17 IEEE Trans. Circuits Syst. Video Techn. 8 http://doi.ieeecomputersociety.org/10.1109/TCSVT.2007.898645 db/journals/tcsv/tcsv17.html#DuanmuAS07