![](https://dblp.uni-trier.de/img/logo.ua.320x120.png)
![](https://dblp.uni-trier.de/img/dropdown.dark.16x16.png)
![](https://dblp.uni-trier.de/img/peace.dark.16x16.png)
Остановите войну!
for scientists:
![search dblp search dblp](https://dblp.uni-trier.de/img/search.dark.16x16.png)
![search dblp](https://dblp.uni-trier.de/img/search.dark.16x16.png)
default search action
BibTeX record journals/tcas/LimBJJLKKSP16
@article{DBLP:journals/tcas/LimBJJLKKSP16, author = {Ji{-}Hoon Lim and Jun{-}Hyun Bae and Jaemin Jang and Hae{-}Kang Jung and Hyunbae Lee and Yongju Kim and Byungsub Kim and Jae{-}Yoon Sim and Hong{-}June Park}, title = {A Delay Locked Loop With a Feedback Edge Combiner of Duty-Cycle Corrector With a 20{\%}-80{\%} Input Duty Cycle for SDRAMs}, journal = {{IEEE} Trans. Circuits Syst. {II} Express Briefs}, volume = {63-II}, number = {2}, pages = {141--145}, year = {2016}, url = {https://doi.org/10.1109/TCSII.2015.2468911}, doi = {10.1109/TCSII.2015.2468911}, timestamp = {Wed, 27 May 2020 17:11:34 +0200}, biburl = {https://dblp.org/rec/journals/tcas/LimBJJLKKSP16.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
![](https://dblp.uni-trier.de/img/cog.dark.24x24.png)
manage site settings
To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.