On-Chip Power-Grid Simulation Using Latency Insertion Method.

Subramanian N. Lalgudi Madhavan Swaminathan Yaron Kretchmer On-Chip Power-Grid Simulation Using Latency Insertion Method. 914-931 2008 55-I IEEE Trans. on Circuits and Systems 3 http://dx.doi.org/10.1109/TCSI.2008.918223 db/journals/tcas/tcasI55.html#LalgudiSK08