<?xml version="1.0"?>
<dblp>
<article key="journals/tcad/ZhengMWLY06" mdate="2006-04-19">
<author>Hao Zheng</author>
<author>Chris J. Myers</author>
<author>David Walter</author>
<author>Scott Little</author>
<author>Tomohiro Yoneda</author>
<title>Verification of timed circuits with failure-directed abstractions.</title>
<pages>403-412</pages>
<year>2006</year>
<volume>25</volume>
<journal>IEEE Trans. on CAD of Integrated Circuits and Systems</journal>
<number>3</number>
<ee>http://dx.doi.org/10.1109/TCAD.2005.854638</ee>
<url>db/journals/tcad/tcad25.html#ZhengMWLY06</url>
</article>
</dblp>
