<?xml version="1.0"?>
<dblp>
<article key="journals/tcad/ZaksYSICGGA08" mdate="2008-09-19">
<author>Aleksandr Zaks</author>
<author>Zijiang Yang</author>
<author>Ilya Shlyakhter</author>
<author>Franjo Ivancic</author>
<author>Srihari Cadambi</author>
<author>Malay K. Ganai</author>
<author>Aarti Gupta</author>
<author>Pranav Ashar</author>
<title>Bitwidth Reduction via Symbolic Interval Analysis for Software Model Checking.</title>
<pages>1513-1517</pages>
<year>2008</year>
<volume>27</volume>
<journal>IEEE Trans. on CAD of Integrated Circuits and Systems</journal>
<number>8</number>
<ee>http://dx.doi.org/10.1109/TCAD.2008.925777</ee>
<url>db/journals/tcad/tcad27.html#ZaksYSICGGA08</url>
</article>
</dblp>
