<?xml version="1.0"?>
<dblp>
<article key="journals/tcad/TessierBNEG07" mdate="2008-04-08">
<author>Russell Tessier</author>
<author>Vaughn Betz</author>
<author>David Neto</author>
<author>Aaron Egier</author>
<author>Thiagaraja Gopalsamy</author>
<title>Power-Efficient RAM Mapping Algorithms for FPGA Embedded Memory Blocks.</title>
<pages>278-290</pages>
<year>2007</year>
<volume>26</volume>
<journal>IEEE Trans. on CAD of Integrated Circuits and Systems</journal>
<number>2</number>
<ee>http://dx.doi.org/10.1109/TCAD.2006.887924</ee>
<url>db/journals/tcad/tcad26.html#TessierBNEG07</url>
</article>
</dblp>
