Ashish Srivastava Dennis Sylvester Minimizing total power by simultaneous V/sub dd//V/sub th/ assignment. 665-677 2004 23 IEEE Trans. on CAD of Integrated Circuits and Systems 5 http://doi.ieeecomputersociety.org/10.1109/TCAD.2004.826551 db/journals/tcad/tcad23.html#SrivastavaS04