BibTeX
@article{DBLP:journals/tcad/ShrivastavaIDPP09,
author = {Aviral Shrivastava and
Ilya Issenin and
Nikil Dutt and
Sanghyun Park and
Yunheung Paek},
title = {Compiler-in-the-Loop Design Space Exploration Framework
for Energy Reduction in Horizontally Partitioned Cache Architectures},
journal = {IEEE Trans. on CAD of Integrated Circuits and Systems},
volume = {28},
number = {3},
year = {2009},
pages = {461-465},
ee = {http://dx.doi.org/10.1109/TCAD.2009.2013275},
bibsource = {DBLP, http://dblp.uni-trier.de}
}
Copyright © 2009-03-23 by Michael Ley (ley@uni-trier.de)