BibTeX record journals/tcad/ShihLYLKLSW14

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@article{DBLP:journals/tcad/ShihLYLKLSW14,
  author       = {Hsiu{-}Chuan Shih and
                  Pei{-}Wen Luo and
                  Jen{-}Chieh Yeh and
                  Shu{-}Yen Lin and
                  Ding{-}Ming Kwai and
                  Shih{-}Lien Lu and
                  Andre Schaefer and
                  Cheng{-}Wen Wu},
  title        = {DArT: {A} Component-Based {DRAM} Area, Power, and Timing Modeling
                  Tool},
  journal      = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
  volume       = {33},
  number       = {9},
  pages        = {1356--1369},
  year         = {2014},
  url          = {https://doi.org/10.1109/TCAD.2014.2323203},
  doi          = {10.1109/TCAD.2014.2323203},
  timestamp    = {Sat, 30 Sep 2023 10:27:50 +0200},
  biburl       = {https://dblp.org/rec/journals/tcad/ShihLYLKLSW14.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}