<?xml version="1.0"?>
<dblp>
<article key="journals/tcad/LingappanRRJC06" mdate="2006-11-30">
<author>Loganathan Lingappan</author>
<author>Srivaths Ravi</author>
<author>Anand Raghunathan</author>
<author>Niraj K. Jha</author>
<author>Srimat T. Chakradhar</author>
<title>Test-Volume Reduction in Systems-on-a-Chip Using Heterogeneous and Multilevel Compression Techniques.</title>
<pages>2193-2206</pages>
<year>2006</year>
<volume>25</volume>
<journal>IEEE Trans. on CAD of Integrated Circuits and Systems</journal>
<number>10</number>
<ee>http://doi.ieeecomputersociety.org/10.1109/TCAD.2005.862735</ee>
<url>db/journals/tcad/tcad25.html#LingappanRRJC06</url>
</article>
</dblp>
