BibTeX
@article{DBLP:journals/tcad/LiLCP08,
author = {Xin Li and
Jiayong Le and
Mustafa Celik and
Lawrence T. Pileggi},
title = {Defining Statistical Timing Sensitivity for Logic Circuits
With Large-Scale Process and Environmental Variations},
journal = {IEEE Trans. on CAD of Integrated Circuits and Systems},
volume = {27},
number = {6},
year = {2008},
pages = {1041-1054},
ee = {http://dx.doi.org/10.1109/TCAD.2008.923241},
bibsource = {DBLP, http://dblp.uni-trier.de}
}
Copyright © 2008-09-19 by Michael Ley (ley@uni-trier.de)