<?xml version="1.0"?>
<dblp>
<article key="journals/tcad/KarfaSMK08" mdate="2008-04-23">
<author>Chandan Karfa</author>
<author>Dipankar Sarkar</author>
<author>Chitta Mandal</author>
<author>P. Kumar</author>
<title>An Equivalence-Checking Method for Scheduling Verification in High-Level Synthesis.</title>
<pages>556-569</pages>
<year>2008</year>
<volume>27</volume>
<journal>IEEE Trans. on CAD of Integrated Circuits and Systems</journal>
<number>3</number>
<ee>http://dx.doi.org/10.1109/TCAD.2007.913390</ee>
<url>db/journals/tcad/tcad27.html#KarfaSMK08</url>
</article>
</dblp>
