BibTeX
@article{DBLP:journals/tcad/KarfaSMK08,
author = {Chandan Karfa and
Dipankar Sarkar and
Chitta Mandal and
P. Kumar},
title = {An Equivalence-Checking Method for Scheduling Verification
in High-Level Synthesis},
journal = {IEEE Trans. on CAD of Integrated Circuits and Systems},
volume = {27},
number = {3},
year = {2008},
pages = {556-569},
ee = {http://dx.doi.org/10.1109/TCAD.2007.913390},
bibsource = {DBLP, http://dblp.uni-trier.de}
}
Copyright © 2008-04-23 by Michael Ley (ley@uni-trier.de)