${\rm SPICE}^2$: Spatial Processors Interconnected for Concurrent Execution for Accelerating the SPICE Circuit Simulator Using an FPGA.

Nachiket Kapre André DeHon ${\rm SPICE}^2$: Spatial Processors Interconnected for Concurrent Execution for Accelerating the SPICE Circuit Simulator Using an FPGA. 9-22 2012 31 IEEE Trans. on CAD of Integrated Circuits and Systems 1 http://dx.doi.org/10.1109/TCAD.2011.2173199 db/journals/tcad/tcad31.html#KapreD12