A low overhead design for testability and test generation technique for core-based systems-on-a-chip.

Indradeep Ghosh Niraj K. Jha Sujit Dey A low overhead design for testability and test generation technique for core-based systems-on-a-chip. 1661-1676 1999 18 IEEE Trans. on CAD of Integrated Circuits and Systems 11 http://doi.ieeecomputersociety.org/10.1109/43.806811 db/journals/tcad/tcad18.html#GhoshJD99