@article{DBLP:journals/tcad/FujiwaraY93,
  author    = {Hideo Fujiwara and
               Akihiro Yamamoto},
  title     = {Parity-scan design to reduce the cost of test application},
  journal   = {IEEE Trans. on CAD of Integrated Circuits and Systems},
  volume    = {12},
  number    = {10},
  year      = {1993},
  pages     = {1604-1611},
  ee        = {http://doi.ieeecomputersociety.org/10.1109/43.256936},
  bibsource = {DBLP, http://dblp.uni-trier.de}
}