BibTeX
@article{DBLP:journals/tcad/FujiwaraIYO08,
author = {Hideo Fujiwara and
Hiroyuki Iwata and
Tomokazu Yoneda and
Chia Yee Ooi},
title = {A Nonscan Design-for-Testability Method for Register-Transfer-Level
Circuits to Guarantee Linear-Depth Time Expansion Models},
journal = {IEEE Trans. on CAD of Integrated Circuits and Systems},
volume = {27},
number = {9},
year = {2008},
pages = {1535-1544},
ee = {http://dx.doi.org/10.1109/TCAD.2008.927757},
bibsource = {DBLP, http://dblp.uni-trier.de}
}
Copyright © 2008-09-19 by Michael Ley (ley@uni-trier.de)