A decoupling technique for efficient timing analysis of VLSI interconnects with dynamic circuit switching.

Yungseon Eo Seongkyun Shin William R. Eisenstadt Jongin Shim A decoupling technique for efficient timing analysis of VLSI interconnects with dynamic circuit switching. 1321-1337 2004 23 IEEE Trans. on CAD of Integrated Circuits and Systems 9 http://doi.ieeecomputersociety.org/10.1109/TCAD.2004.831571 db/journals/tcad/tcad23.html#EoSES04