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Milenko Drinic Darko Kirovski Seapahn Megerian Miodrag Potkonjak Latency-Guided On-Chip Bus-Network Design. 2663-2673 2006 25 IEEE Trans. on CAD of Integrated Circuits and Systems 12 http://dx.doi.org/10.1109/TCAD.2006.882488 db/journals/tcad/tcad25.html#DrinicKMP06