BibTeX record journals/tcad/ChuangSH95

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@article{DBLP:journals/tcad/ChuangSH95,
  author       = {Weitong Chuang and
                  Sachin S. Sapatnekar and
                  Ibrahim N. Hajj},
  title        = {Timing and area optimization for standard-cell {VLSI} circuit design},
  journal      = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
  volume       = {14},
  number       = {3},
  pages        = {308--320},
  year         = {1995},
  url          = {https://doi.org/10.1109/43.365122},
  doi          = {10.1109/43.365122},
  timestamp    = {Thu, 24 Sep 2020 11:28:39 +0200},
  biburl       = {https://dblp.org/rec/journals/tcad/ChuangSH95.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
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