BibTeX record journals/tcad/ChouHHTH11

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@article{DBLP:journals/tcad/ChouHHTH11,
  author       = {Sheng Chou and
                  Cheng{-}Shen Han and
                  Po{-}Kai Huang and
                  Ko{-}Fan Tien and
                  Tsung{-}Yi Ho},
  title        = {An Effective and Efficient Framework for Clock Latency Range Aware
                  Clock Network Synthesis},
  journal      = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
  volume       = {30},
  number       = {7},
  pages        = {1045--1057},
  year         = {2011},
  url          = {https://doi.org/10.1109/TCAD.2011.2110591},
  doi          = {10.1109/TCAD.2011.2110591},
  timestamp    = {Thu, 24 Sep 2020 11:26:45 +0200},
  biburl       = {https://dblp.org/rec/journals/tcad/ChouHHTH11.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
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