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BibTeX record journals/tcad/ChenLW10
@article{DBLP:journals/tcad/ChenLW10, author = {Jwu{-}E Chen and Pei{-}Wen Luo and Chin{-}Long Wey}, title = {Placement Optimization for Yield Improvement of Switched-Capacitor Analog Integrated Circuits}, journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.}, volume = {29}, number = {2}, pages = {313--318}, year = {2010}, url = {https://doi.org/10.1109/TCAD.2009.2035587}, doi = {10.1109/TCAD.2009.2035587}, timestamp = {Thu, 24 Sep 2020 11:28:44 +0200}, biburl = {https://dblp.org/rec/journals/tcad/ChenLW10.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
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