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DBLP BibTeX Record 'journals/tcad/BhardwajV08'

@article{DBLP:journals/tcad/BhardwajV08,
  author    = {Sarvesh Bhardwaj and
               Sarma B. K. Vrudhula},
  title     = {Leakage Minimization of Digital Circuits Using Gate Sizing
               in the Presence of Process Variations},
  journal   = {IEEE Trans. on CAD of Integrated Circuits and Systems},
  volume    = {27},
  number    = {3},
  year      = {2008},
  pages     = {445-455},
  ee        = {http://dx.doi.org/10.1109/TCAD.2008.916341},
  bibsource = {DBLP, http://dblp.uni-trier.de}
}