BibTeX record journals/tcad/BerkelaarBJ96

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@article{DBLP:journals/tcad/BerkelaarBJ96,
  author       = {Michel R. C. M. Berkelaar and
                  Pim H. W. Buurman and
                  Jochen A. G. Jess},
  title        = {Computing the entire active area/power consumption versus delay tradeoff
                  curve for gate sizing with a piecewise linear simulator},
  journal      = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
  volume       = {15},
  number       = {11},
  pages        = {1424--1434},
  year         = {1996},
  url          = {https://doi.org/10.1109/43.543774},
  doi          = {10.1109/43.543774},
  timestamp    = {Thu, 24 Sep 2020 11:27:23 +0200},
  biburl       = {https://dblp.org/rec/journals/tcad/BerkelaarBJ96.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
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