BibTeX
@article{DBLP:journals/tcad/BadarogluTPWVDGM06,
author = {Mustafa Badaroglu and
Kris Tiri and
Geert Van der Plas and
Piet Wambacq and
Ingrid Verbauwhede and
St{\'e}phane Donnay and
Georges G. E. Gielen and
Hugo De Man},
title = {Clock-skew-optimization methodology for substrate-noise
reduction with supply-current folding},
journal = {IEEE Trans. on CAD of Integrated Circuits and Systems},
volume = {25},
number = {6},
year = {2006},
pages = {1146-1154},
ee = {http://doi.ieeecomputersociety.org/10.1109/TCAD.2005.855952},
bibsource = {DBLP, http://dblp.uni-trier.de}
}
Copyright © 2007-05-28 by Michael Ley (ley@uni-trier.de)