A system for full-chip and critical net parasitic extraction for ULSI interconnects using a fast 3-D field solver.

Martin Bächtold Mirko Spasojevic Christian Lage Per B. Ljung A system for full-chip and critical net parasitic extraction for ULSI interconnects using a fast 3-D field solver. 325-338 2000 19 IEEE Trans. on CAD of Integrated Circuits and Systems 3 http://doi.ieeecomputersociety.org/10.1109/43.833201 db/journals/tcad/tcad19.html#BachtoldSLL00