A Cost-Effective Latency-Aware Memory Bus for Symmetric Multiprocessor Systems.

Jongsun Kim Bo-Cheng Lai Mau-Chung Frank Chang Ingrid Verbauwhede A Cost-Effective Latency-Aware Memory Bus for Symmetric Multiprocessor Systems. 1714-1719 2008 57 IEEE Trans. Computers 12 http://dx.doi.org/10.1109/TC.2008.96 db/journals/tc/tc57.html#KimLCV08