Prasad R. Chalasani Sudipta Bhawmik Anurag Acharya P. Pal Chaudhuri Design of Testable VLSI Circuits with Minumum Area Overhead. 1460-1462 1989 38 IEEE Trans. Computers 10 db/journals/tc/tc38.html#ChalasaniBAP89 http://doi.ieeecomputersociety.org/10.1109/12.35841