PitsianisP03'

BibTeX

@article{DBLP:journals/sigarch/PitsianisP03,
  author    = {Nikos Pitsianis and
               Gerald G. Pechanek},
  title     = {Indirect VLIW memory allocation for the ManArray multiprocessor
               DSP},
  journal   = {SIGARCH Computer Architecture News},
  volume    = {31},
  number    = {1},
  year      = {2003},
  pages     = {69-74},
  ee        = {http://doi.acm.org/10.1145/773365.773373},
  bibsource = {DBLP, http://dblp.uni-trier.de}
}