Design optimization of ESD protection and latchup prevention for a serial I/O IC.

Chih-Yao Huang Wei-Fang Chen Song-Yu Chuan Fu-Chien Chiu Jeng-Chou Tseng I-Cheng Lin Chuan-Jane Chao Len-Yi Leu Ming-Dou Ker Design optimization of ESD protection and latchup prevention for a serial I/O IC. 213-221 2004 44 Microelectronics Reliability 2 http://dx.doi.org/10.1016/j.microrel.2003.09.008 db/journals/mr/mr44.html#HuangCCCTLCLK04