<?xml version="1.0"?>
<dblp>
<article key="journals/micro/PapaASLVNM11" mdate="2011-09-01">
<author>David A. Papa</author>
<author>Charles J. Alpert</author>
<author>Cliff C. N. Sze</author>
<author>Zhuo Li</author>
<author>Natarajan Viswanathan</author>
<author>Gi-Joon Nam</author>
<author>Igor L. Markov</author>
<title>Physical Synthesis with Clock-Network Optimization for Large Systems on Chips.</title>
<pages>51-62</pages>
<year>2011</year>
<volume>31</volume>
<journal>IEEE Micro</journal>
<number>4</number>
<ee>http://doi.ieeecomputersociety.org/10.1109/MM.2011.41</ee>
<url>db/journals/micro/micro31.html#PapaASLVNM11</url>
</article>
</dblp>
