Multiplier-less VLSI architecture for real-time computation of multi-dimensional convolution.

Ming Z. Zhang Hau T. Ngo Vijayan K. Asari Multiplier-less VLSI architecture for real-time computation of multi-dimensional convolution. 25-37 2007 31 Microprocessors and Microsystems 1 http://dx.doi.org/10.1016/j.micpro.2006.07.004 db/journals/mam/mam31.html#ZhangNA07