Concurrent error detection for finite state machines implemented with embedded memory blocks of SRAM-based FPGAs.

Andrzej Krasniewski Concurrent error detection for finite state machines implemented with embedded memory blocks of SRAM-based FPGAs. 303-312 2008 32 Microprocessors and Microsystems - Embedded Hardware Design 5-6 http://dx.doi.org/10.1016/j.micpro.2008.03.008 db/journals/mam/mam32.html#Krasniewski08