<?xml version="1.0"?>
<dblp>
<article key="journals/jssc/ZerbeDLSDESRLBSLLK11" mdate="2012-03-27">
<author>Jared Zerbe</author>
<author>Barry Daly</author>
<author>Lei Luo</author>
<author>Bill Stonecypher</author>
<author>Wayne D. Dettloff</author>
<author>John C. Eble</author>
<author>Teva Stone</author>
<author>Jihong Ren</author>
<author>Brian S. Leibowitz</author>
<author>Michael Bucher</author>
<author>Patrick Satarzadeh</author>
<author>Qi Lin</author>
<author>Yue Lu</author>
<author>Ravi Kollipara</author>
<title>A 5 Gb/s Link With Matched Source Synchronous and Common-Mode Clocking Techniques.</title>
<pages>974-985</pages>
<year>2011</year>
<volume>46</volume>
<journal>J. Solid-State Circuits</journal>
<number>4</number>
<ee>http://dx.doi.org/10.1109/JSSC.2011.2108120</ee>
<url>db/journals/jssc/jssc46.html#ZerbeDLSDESRLBSLLK11</url>
</article>
</dblp>
