BibTeX record journals/jssc/YamaokaOI04

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@article{DBLP:journals/jssc/YamaokaOI04,
  author       = {Masanao Yamaoka and
                  Kenichi Osada and
                  Koichiro Ishibashi},
  title        = {0.4-V logic-library-friendly {SRAM} array using rectangular-diffusion
                  cell and delta-boosted-array voltage scheme},
  journal      = {{IEEE} J. Solid State Circuits},
  volume       = {39},
  number       = {6},
  pages        = {934--940},
  year         = {2004},
  url          = {https://doi.org/10.1109/JSSC.2004.827796},
  doi          = {10.1109/JSSC.2004.827796},
  timestamp    = {Fri, 22 Apr 2022 09:29:32 +0200},
  biburl       = {https://dblp.org/rec/journals/jssc/YamaokaOI04.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
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