BibTeX record journals/jssc/WuSHRCCKHLSLCLLHTC24

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@article{DBLP:journals/jssc/WuSHRCCKHLSLCLLHTC24,
  author       = {Ping{-}Chun Wu and
                  Jian{-}Wei Su and
                  Li{-}Yang Hong and
                  Jin{-}Sheng Ren and
                  Chih{-}Han Chien and
                  Ho{-}Yu Chen and
                  Chao{-}En Ke and
                  Hsu{-}Ming Hsiao and
                  Sih{-}Han Li and
                  Shyh{-}Shyuan Sheu and
                  Wei{-}Chung Lo and
                  Shih{-}Chieh Chang and
                  Chung{-}Chuan Lo and
                  Ren{-}Shuo Liu and
                  Chih{-}Cheng Hsieh and
                  Kea{-}Tiong Tang and
                  Meng{-}Fan Chang},
  title        = {A Floating-Point 6T {SRAM} In-Memory-Compute Macro Using Hybrid-Domain
                  Structure for Advanced {AI} Edge Chips},
  journal      = {{IEEE} J. Solid State Circuits},
  volume       = {59},
  number       = {1},
  pages        = {196--207},
  year         = {2024},
  url          = {https://doi.org/10.1109/JSSC.2023.3309966},
  doi          = {10.1109/JSSC.2023.3309966},
  timestamp    = {Sat, 13 Jan 2024 17:37:30 +0100},
  biburl       = {https://dblp.org/rec/journals/jssc/WuSHRCCKHLSLCLLHTC24.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}