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BibTeX record journals/jssc/WangK09
@article{DBLP:journals/jssc/WangK09, author = {Chang{-}Tzu Wang and Ming{-}Dou Ker}, title = {Design of Power-Rail {ESD} Clamp Circuit With Ultra-Low Standby Leakage Current in Nanoscale {CMOS} Technology}, journal = {{IEEE} J. Solid State Circuits}, volume = {44}, number = {3}, pages = {956--964}, year = {2009}, url = {https://doi.org/10.1109/JSSC.2008.2012372}, doi = {10.1109/JSSC.2008.2012372}, timestamp = {Sun, 30 Aug 2020 00:13:11 +0200}, biburl = {https://dblp.org/rec/journals/jssc/WangK09.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
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