BibTeX record journals/jssc/SohnNSSBKLJHJLPLLJPPCKCCJKCJKLC13

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@article{DBLP:journals/jssc/SohnNSSBKLJHJLPLLJPPCKCCJKCJKLC13,
  author       = {Kyomin Sohn and
                  Taesik Na and
                  Indal Song and
                  Yong Shim and
                  Wonil Bae and
                  Sanghee Kang and
                  Dongsu Lee and
                  Hangyun Jung and
                  Seok{-}Hun Hyun and
                  Hanki Jeoung and
                  Ki Won Lee and
                  Jun{-}Seok Park and
                  Jongeun Lee and
                  Byunghyun Lee and
                  Inwoo Jun and
                  Juseop Park and
                  Junghwan Park and
                  Hundai Choi and
                  Sanghee Kim and
                  Haeyoung Chung and
                  Young Choi and
                  Dae{-}Hee Jung and
                  Byungchul Kim and
                  Jung{-}Hwan Choi and
                  Seong{-}Jin Jang and
                  Chi{-}Wook Kim and
                  Jung{-}Bae Lee and
                  Joo{-}Sun Choi},
  title        = {A 1.2 {V} 30 nm 3.2 Gb/s/pin 4 Gb {DDR4} {SDRAM} With Dual-Error Detection
                  and PVT-Tolerant Data-Fetch Scheme},
  journal      = {{IEEE} J. Solid State Circuits},
  volume       = {48},
  number       = {1},
  pages        = {168--177},
  year         = {2013},
  url          = {https://doi.org/10.1109/JSSC.2012.2213512},
  doi          = {10.1109/JSSC.2012.2213512},
  timestamp    = {Sun, 30 Aug 2020 00:14:01 +0200},
  biburl       = {https://dblp.org/rec/journals/jssc/SohnNSSBKLJHJLPLLJPPCKCCJKCJKLC13.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}