BibTeX record journals/jssc/ShikataSKI12

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@article{DBLP:journals/jssc/ShikataSKI12,
  author       = {Akira Shikata and
                  Ryota Sekimoto and
                  Tadahiro Kuroda and
                  Hiroki Ishikuro},
  title        = {A 0.5 {V} 1.1 MS/sec 6.3 fJ/Conversion-Step {SAR-ADC} With Tri-Level
                  Comparator in 40 nm {CMOS}},
  journal      = {{IEEE} J. Solid State Circuits},
  volume       = {47},
  number       = {4},
  pages        = {1022--1030},
  year         = {2012},
  url          = {https://doi.org/10.1109/JSSC.2012.2185352},
  doi          = {10.1109/JSSC.2012.2185352},
  timestamp    = {Sun, 30 Aug 2020 00:12:31 +0200},
  biburl       = {https://dblp.org/rec/journals/jssc/ShikataSKI12.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

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