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BibTeX record journals/jssc/ParkLCPMLKOCCCY23
@article{DBLP:journals/jssc/ParkLCPMLKOCCCY23, author = {Myeong{-}Jae Park and Jinhyung Lee and Kyungjun Cho and Ji Hwan Park and Junil Moon and Sung{-}Hak Lee and Tae{-}Kyun Kim and Sanghoon Oh and Seokwoo Choi and Yongsuk Choi and Ho Sung Cho and Tae{-}Sik Yun and Young Jun Koo and Jae{-}Seung Lee and Byung Kuk Yoon and Young Jun Park and Sangmuk Oh and Chang Kwon Lee and Seong{-}Hee Lee and Hyun{-}Woo Kim and Yucheon Ju and Seung{-}Kyun Lim and Kyo Yun Lee and Sang{-}Hoon Lee and Woo Sung We and Seungchan Kim and Seung Min Yang and Keonho Lee and In{-}Keun Kim and Younghyun Jeon and Jae{-}Hyung Park and Jong Chan Yun and Seonyeol Kim and Dong{-}Yeol Lee and Su{-}Hyun Oh and Junghyun Shin and Yeonho Lee and Jieun Jang and Joohwan Cho}, title = {A 192-Gb 12-High 896-GB/s {HBM3} {DRAM} With a {TSV} Auto-Calibration Scheme and Machine-Learning-Based Layout Optimization}, journal = {{IEEE} J. Solid State Circuits}, volume = {58}, number = {1}, pages = {256--269}, year = {2023}, url = {https://doi.org/10.1109/JSSC.2022.3193354}, doi = {10.1109/JSSC.2022.3193354}, timestamp = {Sat, 16 Mar 2024 15:10:13 +0100}, biburl = {https://dblp.org/rec/journals/jssc/ParkLCPMLKOCCCY23.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
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