BibTeX record journals/jssc/NonisGSCD13

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@article{DBLP:journals/jssc/NonisGSCD13,
  author       = {Roberto Nonis and
                  Werner Grollitsch and
                  Thomas Santa and
                  Dmytro Cherniak and
                  Nicola Da Dalt},
  title        = {digPLL-Lite: {A} Low-Complexity, Low-Jitter Fractional-N Digital {PLL}
                  Architecture},
  journal      = {{IEEE} J. Solid State Circuits},
  volume       = {48},
  number       = {12},
  pages        = {3134--3145},
  year         = {2013},
  url          = {https://doi.org/10.1109/JSSC.2013.2272340},
  doi          = {10.1109/JSSC.2013.2272340},
  timestamp    = {Sun, 30 Aug 2020 00:13:58 +0200},
  biburl       = {https://dblp.org/rec/journals/jssc/NonisGSCD13.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
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