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@article{DBLP:journals/jssc/NobukataTHOMKHS00,
  author       = {Hiromi Nobukata and
                  Shunsuke Takagi and
                  Keizo Hiraga and
                  Takeshi Ohgishi and
                  Masaru Miyashita and
                  Kazuto Kamimura and
                  Shinji Hiramatsu and
                  Kiyohisa Sakai and
                  Takahiro Ishida and
                  Hideki Arakawa and
                  Masahiko Itoh and
                  Ihachi Naiki and
                  Masanori Noda},
  title        = {A 144-Mb, eight-level {NAND} flash memory with optimized pulsewidth
                  programming},
  journal      = {{IEEE} J. Solid State Circuits},
  volume       = {35},
  number       = {5},
  pages        = {682--690},
  year         = {2000},
  url          = {https://doi.org/10.1109/4.841491},
  doi          = {10.1109/4.841491},
  timestamp    = {Fri, 08 Apr 2022 11:01:38 +0200},
  biburl       = {https://dblp.org/rec/journals/jssc/NobukataTHOMKHS00.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}